Mark
@marcusviniciusfdasilvaEstudante de Mestrado em Engenharia Eletrotécnica na UBI. Interessado em sistemas embarcados, FPGA e segurança. Membro do IEEE UBI SB e ELECTRUB.
Portugal, Covilhã
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Language Breakdown
Lines of code distribution across 1 owned repositories
3.7M
Total LOC
SystemVerilog
2,070,621 lines
56.0%
N/A
Verilog
1,199,848 lines
32.4%
N/A
C
152,180 lines
4.1%
N/A
Perl
90,906 lines
2.5%
N/A
Tcl
75,453 lines
2.0%
N/A
Other
108,943 lines
2.9%
N/A
T
T-Shaped Developer
T-shapedDeep in SystemVerilog with broad versatility
SystemVerilog
Verilog
C
Perl
Tcl
Collaboration Network
Global Impact visualization
Repos
1
PRs
0
Growth
+18%
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Coding Streak
Contribution activity over the past year
1 day
5
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4
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Pull Requests
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Following
5 total
Gustavo Guanabara
@gustavoguanabara
helbert-rocha
@helbert-rocha
José Rita
@Zkah999
David Gomes
@david-e-gomes
Joachim Strömbergson
@secworks
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Open Source Impact
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0 merged PRs
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